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@@ -67,7 +67,7 @@ mov   [ebx],dl
 <H4 ALIGN="LEFT"><A NAME="Heading7"></A><FONT COLOR="#000077">Register Starvation</FONT></H4>
 <P>The above examples should make it pretty clear that effective superscalar programming puts a lot of strain on the Pentium&#146;s relatively small register set. There are only seven general-purpose registers (I strongly suggest using EBP in critical loops), and it does not help to have to sacrifice one of those registers for temporary storage on each complex memory operation; in pre-superscalar days, we used to employ those handy CISC memory instructions to do all that stuff without using any extra registers.
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-<TABLE WIDTH="100%"><TD VALIGN="TOP" ALIGN="LEFT" WIDTH="5%"><IMG SRC="images/20-05i.jpg"><TD VALIGN="TOP" ALIGN="LEFT" WIDTH="95%"><SMALL><I>More problematic still is that for maximum pairing, you&#146;ll typically have two operations proceeding at once, one in each pipe, and trying to keep two operations in registers at once is difficult indeed. There&#146;s not much to be done about this, other than clever and Spartan register usage, but be aware that it&#146;s a major element of Pentium performance programming.</I></SMALL>
+<TABLE WIDTH="100%"><TD VALIGN="TOP" ALIGN="LEFT" WIDTH="5%"><IMG SRC="images/i.jpg"><TD VALIGN="TOP" ALIGN="LEFT" WIDTH="95%"><SMALL><I>More problematic still is that for maximum pairing, you&#146;ll typically have two operations proceeding at once, one in each pipe, and trying to keep two operations in registers at once is difficult indeed. There&#146;s not much to be done about this, other than clever and Spartan register usage, but be aware that it&#146;s a major element of Pentium performance programming.</I></SMALL>
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 <P>Also be aware that prefixes of every sort, with the sole exception of the 0FH prefix on non-short conditional jumps, always execute in the U-pipe, and that Intel&#146;s documentation indicates that no pairing can happen while a prefix byte executes. (As I&#146;ll discuss in the next chapter, my experiments indicate that this rule doesn&#146;t always apply to multiple-cycle instructions, but you still won&#146;t go far wrong by assuming that the above rule is correct and trying to eliminate prefix bytes.) A prefix byte takes one cycle to execute; after that cycle, the actual prefixed instruction itself will go through the U-pipe, and if it and the following instruction are mutually pairable, then they will pair. Nonetheless, prefix bytes are very expensive, effectively taking at least as long as two normal instructions, and possibly, if a prefixed instruction could otherwise have paired in the V-pipe with the previous instruction, taking as long as three normal instructions, as shown in Figure 20.8.
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