Misc/abrash-black-book
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James Gregory 2013-12-30 12:25:34 +11:00
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@ -118,7 +118,7 @@ xlat
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<P>even though AL must be converted to a word by <B>XLAT</B> before it can be added to BX and used to address memory. In fact, none of the penalties mentioned in this chapter apply to <B>XLAT</B>, apparently because <B>XLAT</B> is so slow&#151;4 cycles&#151;that it gives the 486 time to perform addressing calculations during the course of the instruction.</P>
<TABLE WIDTH="100%"><TD ALIGN="LEFT" VALIGN="TOP" WIDTH="5%"><IMG SRC="images/12-04i.jpg"><TD ALIGN="LEFT" VALIGN="TOP" WIDTH="95%"><SMALL><I>While it&#146;s nice that <B>XLAT</B> doesn&#146;t suffer from the various 486 addressing penalties, the reason for that is basically that <B>XLAT</B> is slow, so there&#146;s still no compelling reason to use <B>XLAT</B> on the 486.</I></SMALL>
<TABLE WIDTH="100%"><TD ALIGN="LEFT" VALIGN="TOP" WIDTH="5%"><IMG SRC="images/i.jpg"><TD ALIGN="LEFT" VALIGN="TOP" WIDTH="95%"><SMALL><I>While it&#146;s nice that <B>XLAT</B> doesn&#146;t suffer from the various 486 addressing penalties, the reason for that is basically that <B>XLAT</B> is slow, so there&#146;s still no compelling reason to use <B>XLAT</B> on the 486.</I></SMALL>
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<P>In general, penalties for interrupting the 486&#146;s pipeline apply primarily to the fast core instructions of the 486, most notably register-only instructions and <B>MOV</B>, although arithmetic and logical operations that access memory are also often affected. I don&#146;t know all the performance dependencies, and I don&#146;t plan to; figuring all of them out would be a big, boring job of little value. Basically, on the 486 you should concentrate on using those fast core instructions when performance matters, and all the rules I&#146;ll discuss do indeed apply to those instructions.</P><P><BR></P>
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