Misc/abrash-black-book
Watch
1
0
Fork
You've already forked abrash-black-book
 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Convert notes into blockquotes

Browse source
This commit is contained in:
James Gregory 2013-12-31 11:06:31 +11:00
commit 8ed9dea394
105 changed files with 884 additions and 411 deletions
Download patch file Download diff file Expand all files Collapse all files

14
25-06.md
View file

@ -31,9 +31,17 @@ Set/Reset register is inactive in write mode 3, but the Set/Reset
register provides the primary drawing color in write mode 3, as
discussed in the next chapter.
------------------- -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
![](images/i.jpg) *Be aware that because set/reset directly replaces CPU data, it does not necessarily have to force an entire display memory byte to 0 or 0FFH, even when set/reset is replacing CPU data for all planes. For example, if the Bit Mask register is set to 80H, the set/reset circuitry can only modify bit 7 of the destination byte in each plane, since the other seven bits will come from the latches for each plane. Similarly, the set/reset value for each plane can be modified by that plane's ALU. Once again, this illustrates that set/reset merely replaces the CPU data for selected planes; the set/reset value is then processed in exactly the same way that CPU data normally is.*
------------------- -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
> ![](images/i.jpg)
> Be aware that because set/reset directly replaces CPU data, it does not
> necessarily have to force an entire display memory byte to 0 or 0FFH,
> even when set/reset is replacing CPU data for all planes. For example,
> if the Bit Mask register is set to 80H, the set/reset circuitry can only
> modify bit 7 of the destination byte in each plane, since the other
> seven bits will come from the latches for each plane. Similarly, the
> set/reset value for each plane can be modified by that plane's ALU. Once
> again, this illustrates that set/reset merely replaces the CPU data for
> selected planes; the set/reset value is then processed in exactly the
> same way that CPU data normally is.
### A Brief Note on Word OUTs {#Heading9}