Use proper lists instead of DLs with bullet points
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04-01.html
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04-01.html
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<H4 ALIGN="LEFT"><A NAME="Heading5"></A><FONT COLOR="#000077">The 8088’s Ancestral Cycle-Eaters</FONT></H4>
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<P>Internally, the 8088 is a 16-bit processor, capable of running at full speed at all times—unless external data is required. External data must traverse the 8088’s external data bus and the PC’s data bus one byte at a time to and from peripherals, with cycle-eaters lurking along every step of the way. What’s more, external data includes not only memory operands <I>but also instruction bytes,</I> so even instructions with no memory operands can suffer from cycle-eaters. Since some of the 8088’s fastest instructions are register-only instructions, that’s important indeed.</P>
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<P>The major cycle-eaters are:</P>
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<DL>
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<DD><B>•</B> The 8088’s 8-bit external data bus.
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<DD><B>•</B> The prefetch queue.
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<DD><B>•</B> Dynamic RAM refresh.
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<DD><B>•</B> Wait states, notably display memory wait states and, in the AT and 80386 computers, system memory wait states.
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</DL>
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<ul>
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<li>The 8088’s 8-bit external data bus.</li>
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<li>The prefetch queue.</li>
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<li>Dynamic RAM refresh.</li>
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<li>Wait states, notably display memory wait states and, in the AT and 80386 computers, system memory wait states.</li>
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</ul>
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<P>The locations of these cycle-eaters in the primordial 8088-based PC are shown in Figure 4.1. We’ll cover each of the cycle-eaters in turn in this chapter. The material won’t be easy since cycle-eaters are among the most subtle aspects of assembly programming. By the same token, however, this will be one of the most important and rewarding chapters in this book. Don’t worry if you don’t catch everything in this chapter, but do read it all even if the going gets a bit tough. Cycle-eaters play a key role in later chapters, so some familiarity with them is highly desirable.
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</P>
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<H3><A NAME="Heading6"></A><FONT COLOR="#000077">The 8-Bit Bus Cycle-Eater</FONT></H3>
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