Convert figure images to markdown
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20-04.md
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@ -23,12 +23,10 @@ instructions take 5 cycles in all to execute, and 4 cycles of idle
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time—2 in the U-pipe and 2 in the V-pipe, out of 10 cycles in all—are
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incurred in the process.
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\
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**Figure 20.6** *Non-overlapped lockstep execution.*
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**Figure 20.7** *Interleaving simple instructions for maximum
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performance.*
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The solution is to break the instructions into simple instructions and
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interleave them, as shown in Figure 20.7, which accomplishes the same
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@ -119,5 +117,4 @@ always been to grab the Zen timer and *measure actual performance*—and
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nowhere is this more true than on the Pentium. Don't believe it until
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you measure it!
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\
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**Figure 20.8** *Prefix delays.*
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