Convert figure images to markdown
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20-03.md
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@ -43,8 +43,7 @@ that is often not correct.
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 *The actual rule is that we should strive to pair one-cycle instructions (or, at most, two-cycle instructions, but not three-cycle instructions), which in turn leads to the corollary that we should, in general, use mostly one-cycle instructions when optimizing.*
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------------------- ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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\
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**Figure 20.4** *Lockstep execution and idle time in the V-pipe.*
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Here's why. The Pentium is fully capable of handling instructions that
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use memory operands in either pipe, or, if necessary, in both pipes at
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@ -73,8 +72,7 @@ banks your paired memory accesses fall in—that's just too much work—but
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you might want to watch out for simultaneously read addresses that have
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the same values for address
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\
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**Figure 20.5** *The Pentium's eight bank data cache.*
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bits 2, 3, and 4 (fall in the same bank) in tight loops, and you should
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also avoid sequences like
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