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James Gregory
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26-03.html
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26-03.html
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@ -38,27 +38,27 @@
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<P><BR></P>
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<P>The key to understanding Listing 26.1 is understanding the effect of ANDing the rotated CPU data with the contents of the Bit Mask register. The CPU data is the pattern for the character to be drawn, with bits equal to 1 indicating where character pixels are to appear. The Data Rotate register is set to rotate the CPU data to pixel-align it, since without rotation characters could only be drawn on byte boundaries.
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</P>
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<TABLE WIDTH="100%"><TD WIDTH="5%" VALIGN="TOP"><IMG SRC="images/i.jpg"><TD WIDTH="95%"><SMALL><I>As I pointed out in Chapter 25, the CPU is perfectly capable of rotating the data itself, and it’s often the case that that’s more efficient. The problem with using the Data Rotate register is that the <B>OUT</B> that sets that register is time-consuming, especially for proportional text, which requires a different rotation for each character. Also, if the code performs full-byte accesses to display memory—that is, if it combines pieces of two adjacent characters into one byte—whenever possible for efficiency, the CPU generally has to do extra work to prepare the data so the VGA’s rotator can handle it.</I></SMALL>
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<TABLE WIDTH="100%"><TD WIDTH="5%" VALIGN="TOP"><IMG SRC="images/i.jpg"><TD WIDTH="95%"><SMALL><I>As I pointed out in Chapter 25, the CPU is perfectly capable of rotating the data itself, and it’s often the case that that’s more efficient. The problem with using the Data Rotate register is that the <B>OUT</B> that sets that register is time-consuming, especially for proportional text, which requires a different rotation for each character. Also, if the code performs full-byte accesses to display memory—that is, if it combines pieces of two adjacent characters into one byte—whenever possible for efficiency, the CPU generally has to do extra work to prepare the data so the VGA’s rotator can handle it.</I></SMALL>
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</TABLE>
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<P>At the same time that the Data Rotate register is set, the Bit Mask register is set to allow the CPU to modify only that portion of the display memory byte accessed that the pixel-aligned character falls in, so that other characters and/or graphics data won’t be wiped out. The result of ANDing the rotated CPU data byte with the contents of the Bit Mask register is a bit mask that allows only the bits equal to 1 in the original character pattern (rotated and masked to provide pixel alignment) to be modified by the CPU; all other bits come straight from the latches. The latches should have previously been loaded from the target address, so the effect of the ultimate synthesized bit mask value is to allow the CPU to modify only those pixels in display memory that correspond to the 1 bits in that part of the pixel-aligned character that falls in the currently addressed byte. The color of the pixels set by the CPU is determined by the contents of the Set/Reset register.
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<P>At the same time that the Data Rotate register is set, the Bit Mask register is set to allow the CPU to modify only that portion of the display memory byte accessed that the pixel-aligned character falls in, so that other characters and/or graphics data won’t be wiped out. The result of ANDing the rotated CPU data byte with the contents of the Bit Mask register is a bit mask that allows only the bits equal to 1 in the original character pattern (rotated and masked to provide pixel alignment) to be modified by the CPU; all other bits come straight from the latches. The latches should have previously been loaded from the target address, so the effect of the ultimate synthesized bit mask value is to allow the CPU to modify only those pixels in display memory that correspond to the 1 bits in that part of the pixel-aligned character that falls in the currently addressed byte. The color of the pixels set by the CPU is determined by the contents of the Set/Reset register.
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</P>
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<P>Whew. It sounds complex, but given an understanding of what the data rotator, set/reset, and the bit mask do, it’s not that bad. One good way to make sense of it is to refer to the original text-drawing program in Listing 25.1 back in Chapter 25, and then see how Listing 26.1 differs from that program.</P>
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<P>It’s worth noting that the results generated by Listing 26.1 could have been accomplished without write mode 3. Write mode 0 could have been used instead, but at a significant performance cost. Instead of letting write mode 3 rotate the CPU data and AND it with the contents of the Bit Mask register, the CPU could simply have rotated the CPU data directly and ANDed it with the value destined for the Bit Mask register and then set the Bit Mask register to the resulting value. Additionally, enable set/reset could have been forced on for all planes, emulating what write mode 3 does to provide pixel colors.</P>
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<P>The write mode 3 approach used in Listing 26.1 can be efficiently extended to drawing large blocks of text. For example, suppose that we were to draw a line of 8-pixel-wide bit-mapped text 40 characters long. We could then set up the bit mask and data rotation as appropriate for the left portion of each bit-aligned character (the portion of each character to the left of the byte boundary) and then draw the left portions only of all 40 characters in write mode 3. Then the bit mask could be set up for the right portion of each character, and the right portions of all 40 characters could be drawn. The VGA’s fast rotator would be used to do all rotation, and the only <B>OUT</B>s required would be those required to set the bit mask and data rotation. This technique could well outperform single-character bit-mapped text drivers such as the one in Listing 26.1 by a significant margin. Listing 26.2 illustrates one implementation of such an approach. Incidentally, note the use of the 8×14 ROM font in Listing 26.2, rather than the 8×8 ROM font used in Listing 26.1. There is also an 8×16 font stored in ROM, along with the tables used to alter the 8×14 and 8×16 ROM fonts into 9×14 and 9×16 fonts.</P>
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<P>Whew. It sounds complex, but given an understanding of what the data rotator, set/reset, and the bit mask do, it’s not that bad. One good way to make sense of it is to refer to the original text-drawing program in Listing 25.1 back in Chapter 25, and then see how Listing 26.1 differs from that program.</P>
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<P>It’s worth noting that the results generated by Listing 26.1 could have been accomplished without write mode 3. Write mode 0 could have been used instead, but at a significant performance cost. Instead of letting write mode 3 rotate the CPU data and AND it with the contents of the Bit Mask register, the CPU could simply have rotated the CPU data directly and ANDed it with the value destined for the Bit Mask register and then set the Bit Mask register to the resulting value. Additionally, enable set/reset could have been forced on for all planes, emulating what write mode 3 does to provide pixel colors.</P>
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<P>The write mode 3 approach used in Listing 26.1 can be efficiently extended to drawing large blocks of text. For example, suppose that we were to draw a line of 8-pixel-wide bit-mapped text 40 characters long. We could then set up the bit mask and data rotation as appropriate for the left portion of each bit-aligned character (the portion of each character to the left of the byte boundary) and then draw the left portions only of all 40 characters in write mode 3. Then the bit mask could be set up for the right portion of each character, and the right portions of all 40 characters could be drawn. The VGA’s fast rotator would be used to do all rotation, and the only <B>OUT</B>s required would be those required to set the bit mask and data rotation. This technique could well outperform single-character bit-mapped text drivers such as the one in Listing 26.1 by a significant margin. Listing 26.2 illustrates one implementation of such an approach. Incidentally, note the use of the 8x14 ROM font in Listing 26.2, rather than the 8x8 ROM font used in Listing 26.1. There is also an 8x16 font stored in ROM, along with the tables used to alter the 8x14 and 8x16 ROM fonts into 9x14 and 9x16 fonts.</P>
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<P><B>LISTING 26.2 L26-2.ASM</B></P>
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<!-- CODE //-->
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<PRE>
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; Program to illustrate high-speed text-drawing operation of
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; write mode 3 of the VGA.
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; Draws a string of 8×14 characters at arbitrary locations
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; without disturbing the background, using VGA’s 8×14 ROM font.
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; Draws a string of 8x14 characters at arbitrary locations
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; without disturbing the background, using VGA’s 8x14 ROM font.
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; Designed for use with modes 0Dh, 0Eh, 0Fh, 10h, and 12h.
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; Runs only on VGAs (in Models 50 & up and IBM Display Adapter
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; and 100% compatibles).
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; Assembled with MASM
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; By Michael Abrash
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;
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stack segment para stack ‘STACK’
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stack segment para stack ‘STACK’
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db 512 dup(?)
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stack ends
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;
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@ -78,22 +78,22 @@ GC_ROTATE equ 3 ;GC data rotate/logical function
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GC_MODE equ 5 ;GC Mode register
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GC_BIT_MASK equ 8 ;GC bit mask register index
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;
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dseg segment para common ‘DATA’
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dseg segment para common ‘DATA’
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TEST_TEXT_ROW equ 69 ;row to display test text at
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TEST_TEXT_COL equ 17 ;column to display test text at
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TEST_TEXT_COLOR equ 0fh ;high intensity white
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TestString label byte
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db ‘Hello, world!’,0 ;test string to print.
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db ‘Hello, world!’,0 ;test string to print.
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FontPointer dd ? ;font offset
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dseg ends
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;
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cseg segment para public ‘CODE’
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cseg segment para public ‘CODE’
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assume cs:cseg, ds:dseg
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start proc near
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mov ax,dseg
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mov ds,ax
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;
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; Select 640×480 graphics mode.
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; Select 640x480 graphics mode.
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;
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mov ax,012h
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int 10h
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@ -122,14 +122,14 @@ start proc near
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mov di,0
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mov cx,8000h ;fill all 32k words
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mov ax,0ffffh ;because of set/reset, the value
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; written actually doesn’t matter
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; written actually doesn’t matter
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rep stosw ;fill with blue
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;
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; Set driver to use the 8×14 font.
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; Set driver to use the 8x14 font.
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;
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mov ah,11h ;VGA BIOS character generator function,
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mov al,30h ; return info subfunction
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mov bh,2 ;get 8×14 font pointer
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mov bh,2 ;get 8x14 font pointer
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int 10h
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call SelectFont
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;
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@ -166,7 +166,7 @@ Start endp
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; CX = column to start string at
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; DS:SI = string to draw
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;
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; Forces ALU function to “move”.
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; Forces ALU function to “move”.
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; Forces write mode 3.
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;
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DrawString proc near
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@ -225,7 +225,7 @@ DrawString proc near
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;
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; Set up the GC rotation. In write mode 3, this is the rotation
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; of CPU data before it is ANDed with the Bit Mask register to
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; form the bit mask. Force the ALU function to “move”. Uses the
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; form the bit mask. Force the ALU function to “move”. Uses the
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; readability of VGA registers to leave reserved bits unchanged.
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;
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mov dx,GC_INDEX
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@ -360,7 +360,7 @@ CharacterUp endp
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;
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SelectFont proc near
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mov word ptr [FontPointer],bp ;save pointer
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mov word ptr [FontPointer+2],es
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mov word ptr [FontPointer+2],es
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ret
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SelectFont endp
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;
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@ -368,12 +368,12 @@ cseg ends
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end start
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</PRE>
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<!-- END CODE //-->
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<P>In this chapter, I’ve tried to give you a feel for how write mode 3 works and what it might be used for, rather than providing polished, optimized, plug-it-in-and-go code. Like the rest of the VGA’s write path, write mode 3 is a resource that can be used in a remarkable variety of ways, and I don’t want to lock you into thinking of it as useful in just one context. Instead, you should take the time to thoroughly understand what write mode 3 does, and then, when you do VGA programming, think about how write mode 3 can best be applied to the task at hand. Because I focused on illustrating the operation of write mode 3, neither listing in this chapter is the fastest way to accomplish the desired result. For example, Listing 26.2 could be made nearly twice as fast by simply having the CPU rotate, mask, and join the bytes from adjacent characters, then draw the combined bytes to display memory in a single operation.
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<P>In this chapter, I’ve tried to give you a feel for how write mode 3 works and what it might be used for, rather than providing polished, optimized, plug-it-in-and-go code. Like the rest of the VGA’s write path, write mode 3 is a resource that can be used in a remarkable variety of ways, and I don’t want to lock you into thinking of it as useful in just one context. Instead, you should take the time to thoroughly understand what write mode 3 does, and then, when you do VGA programming, think about how write mode 3 can best be applied to the task at hand. Because I focused on illustrating the operation of write mode 3, neither listing in this chapter is the fastest way to accomplish the desired result. For example, Listing 26.2 could be made nearly twice as fast by simply having the CPU rotate, mask, and join the bytes from adjacent characters, then draw the combined bytes to display memory in a single operation.
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</P>
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<P>Similarly, Listing 26.1 is designed to illustrate write mode 3 and its interaction with the rest of the VGA as a contrast to Listing 25.1 in Chapter 25, rather than for maximum speed, and it could be made considerably more efficient. If we were going for performance, we’d have the CPU not only rotate the bytes into position, but also do the masking by ANDing in software. Even more significantly, we would have the CPU combine adjacent characters into complete, rotated bytes whenever possible, so that only one drawing operation would be required per byte of display memory modified. By doing this, we would eliminate all per-character <B>OUT</B>s, and would minimize display memory accesses, approximately doubling text-drawing speed.</P>
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<P>As a final note, consider that non-transparent text could also be accelerated with write mode 3. The latches could be filled with the background (text box) color, set/reset could be set to the foreground (text) color, and write mode 3 could then be used to turn monochrome text bytes written by the CPU into characters on the screen with just one write per byte. There are complications, such as drawing partial bytes, and rotating the bytes to align the characters, which we’ll revisit later on in Chapter 55, while we’re working through the details of the X-Sharp library. Nonetheless, the performance benefit of this approach can be a speedup of as much as four times—all thanks to the decidedly quirky but surprisingly powerful and flexible write mode 3.</P>
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<P>Similarly, Listing 26.1 is designed to illustrate write mode 3 and its interaction with the rest of the VGA as a contrast to Listing 25.1 in Chapter 25, rather than for maximum speed, and it could be made considerably more efficient. If we were going for performance, we’d have the CPU not only rotate the bytes into position, but also do the masking by ANDing in software. Even more significantly, we would have the CPU combine adjacent characters into complete, rotated bytes whenever possible, so that only one drawing operation would be required per byte of display memory modified. By doing this, we would eliminate all per-character <B>OUT</B>s, and would minimize display memory accesses, approximately doubling text-drawing speed.</P>
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<P>As a final note, consider that non-transparent text could also be accelerated with write mode 3. The latches could be filled with the background (text box) color, set/reset could be set to the foreground (text) color, and write mode 3 could then be used to turn monochrome text bytes written by the CPU into characters on the screen with just one write per byte. There are complications, such as drawing partial bytes, and rotating the bytes to align the characters, which we’ll revisit later on in Chapter 55, while we’re working through the details of the X-Sharp library. Nonetheless, the performance benefit of this approach can be a speedup of as much as four times—all thanks to the decidedly quirky but surprisingly powerful and flexible write mode 3.</P>
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<H3><A NAME="Heading4"></A><FONT COLOR="#000077">A Note on Preserving Register Bits</FONT></H3>
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<P>If you take a quick look, you’ll see that the code in Listing 26.1 uses the readable register feature of the VGA to preserve reserved bits and bits other than those being modified. Older adapters such as the CGA and EGA had few readable registers, so it was necessary to set all bits in a register whenever that register was modified. Happily, all VGA registers are readable, which makes it possible to change only those bits of immediate interest, and, in general, I highly recommend doing exactly that, since IBM (or clone manufacturers) may well someday use some of those reserved bits or change the meanings of some of the bits that are currently in use.
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<P>If you take a quick look, you’ll see that the code in Listing 26.1 uses the readable register feature of the VGA to preserve reserved bits and bits other than those being modified. Older adapters such as the CGA and EGA had few readable registers, so it was necessary to set all bits in a register whenever that register was modified. Happily, all VGA registers are readable, which makes it possible to change only those bits of immediate interest, and, in general, I highly recommend doing exactly that, since IBM (or clone manufacturers) may well someday use some of those reserved bits or change the meanings of some of the bits that are currently in use.
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</P><P><BR></P>
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<CENTER>
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<TABLE BORDER>
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