Change bold code snippets to inline code blocks

34-02.md

@@ -16,7 +16,7 @@ The DAC can be loaded either directly or through subfunctions 10H (for a
 single DAC register) or 12H (for a block of DAC registers) of the BIOS
 video service interrupt 10H, function 10H, described in Chapter 33. For
 cycling the contents of the entire DAC, the block-load function (invoked
-by executing **INT** 10H with AH = 10H and AL = 12H to load a block of
+by executing `INT` 10H with AH = 10H and AL = 12H to load a block of
 CX DAC locations, starting at location BX, from the block of RGB
 triplets—3 bytes per triplet—starting at ES:DX into the DAC) would be
 the better of the two, due to the considerably greater efficiency of
@@ -31,7 +31,7 @@ they have problems. Serious problems.
 The difficulty is this: IBM's BIOS specification describes exactly how
 the parameters passed to the BIOS control the loading of DAC locations,
 and all clone BIOSes meet that specification scrupulously, which is to
-say that if you invoke **INT** 10H, function 10H, subfunction 12H with a
+say that if you invoke `INT` 10H, function 10H, subfunction 12H with a
 given set of parameters, you can be sure that you will end up with the
 same values loaded into the same DAC locations on all VGAs from all
 vendors. IBM's spec does *not*, however, describe whether vertical
@@ -85,19 +85,19 @@ we'll see next.
 #### Loading the DAC Directly {#Heading6}
 
 So we must load the DAC directly in order to perform color cycling. The
-DAC is loaded directly by sending (with an **OUT** instruction) the
+DAC is loaded directly by sending (with an `OUT` instruction) the
 number of the DAC location to be loaded to the DAC Write Index register
-at 3C8H and then performing three **OUT**s to write an RGB triplet to
+at 3C8H and then performing three `OUT`s to write an RGB triplet to
 the DAC Data register at 3C9H. This approach must be repeated 256 times
-to load the entire DAC, requiring over a thousand **OUT**s in all.
+to load the entire DAC, requiring over a thousand `OUT`s in all.
 
 There is another, somewhat faster approach, but one that has its risks.
 After an RGB triplet is written to the DAC Data register, the DAC Write
 Index register automatically increments to point to the next DAC
 location, and this repeats indefinitely as successive RGB triplets are
 written to the DAC. By taking advantage of this feature, the entire DAC
-can be loaded with just 769 **OUT**s: one **OUT** to the DAC Write Index
-register and 768 **OUT**s to the DAC Data register.
+can be loaded with just 769 `OUT`s: one `OUT` to the DAC Write Index
+register and 768 `OUT`s to the DAC Data register.
 
 So what's the drawback? Well, imagine that as you're loading the DAC, an
 interrupt-driven TSR (such as a program switcher or multitasker)