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Change bold code snippets to inline code blocks

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James Gregory 2013-12-31 17:12:29 +11:00
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@ -43,7 +43,7 @@ writes the result to that plane. This arrangement allows four display
memory bytes to be modified by a single CPU write (which must often be
preceded by a single CPU read, as we will see). The benefit is vastly
improved performance; if the CPU had to select each of the four planes
in turn via **OUT**s and perform the four logical operations itself, VGA
in turn via `OUT`s and perform the four logical operations itself, VGA
performance would slow to a crawl.
Figure 24.1 is a simplified depiction of data flow around the ALUs. Each