Change bold code snippets to inline code blocks

23-05.md

@@ -48,21 +48,21 @@ simultaneously.
 The images are written to a nondisplayed portion of VGA memory in order
 to take advantage of a useful VGA hardware feature, the ability to copy
 all four planes at once. As shown by the image-loading code discussed
-above, four different sets of reads and writes—and several **OUT**s as
+above, four different sets of reads and writes—and several `OUT`s as
 well—are required to copy a multicolored image into VGA memory as would
 be needed to draw the same image into a non-planar pixel buffer. This
 causes unacceptably slow performance, all the more so because the wait
 states that occur on accesses to VGA memory make it very desirable to
-minimize display memory accesses, and because **OUT**s tend to be very
+minimize display memory accesses, and because `OUT`s tend to be very
 slow.
 
 The solution is to take advantage of the VGA's write mode 1, which is
 selected via bits 0 and 1 of the GC Mode register (GC register 5). (Be
 careful to preserve bits 2-7 when setting bits 0 and 1, as is done in
-Listing 23.1.) In write mode 1, a single **CPU** read loads the
+Listing 23.1.) In write mode 1, a single `CPU` read loads the
 addressed byte from all four planes into the VGA's four internal
-latches, and a single **CPU** write writes the contents of the latches
-to the four planes. During the write, the byte written by the **CPU** is
+latches, and a single `CPU` write writes the contents of the latches
+to the four planes. During the write, the byte written by the `CPU` is
 irrelevant.
 
 The sample program uses write mode 1 to copy the images that were