Change bold code snippets to inline code blocks

20-01.md

@@ -67,7 +67,7 @@ we'll see shortly, that doesn't mean that optimized Pentium code looks
 much like optimized 486 code, or that fast 486 code runs particularly
 well on a Pentium. (Fast Pentium code, on the other hand, does tend to
 run well on the 486; the only major downsides are that it's larger, and
-that the **FXCH** instruction, which is largely free on the Pentium, is
+that the `FXCH` instruction, which is largely free on the Pentium, is
 expensive on the 486.) So discard your x86 preconceptions as we delve
 into superscalar optimization for this one-of-a-kind processor.
 
@@ -107,9 +107,9 @@ instructions and is always active, with the objective being to keep the
 V-pipe also working as much of the time as possible.) The U-pipe is
 generally similar to a full 486 in terms of both capabilities and
 instruction cycle counts. The V-pipe is a 486 subset, able to execute
-simple instructions such as **MOV** and **ADD**, but unable to handle
-**MUL, DIV**, string instructions, any sort of rotation or shift, or
-even **ADC** or **SBB**.
+simple instructions such as `MOV` and `ADD`, but unable to handle
+`MUL, DIV`, string instructions, any sort of rotation or shift, or
+even `ADC` or `SBB`.
 
 ![**Figure 20.1**  *The Pentium's two pipes.*](images/20-01.jpg)
 
@@ -117,16 +117,16 @@ Getting two instructions executing simultaneously in the two pipes is
 trickier than it sounds, not only because the V-pipe can handle only a
 relatively small subset of the Pentium's instruction set, but also
 because those instructions that the V-pipe can handle are able to pair
-only with certain U-pipe instructions. For example, **MOVSD** uses both
-pipes, so no instruction can be executed in parallel with **MOVSD**.
+only with certain U-pipe instructions. For example, `MOVSD` uses both
+pipes, so no instruction can be executed in parallel with `MOVSD`.
 
 > ![](images/i.jpg)
-> The use of both pipes does make **MOVSD** nearly twice as fast on the
+> The use of both pipes does make `MOVSD` nearly twice as fast on the
 > Pentium as on the 486, but it's nonetheless slower than using equivalent
 > simpler instructions that allow for superscalar execution. Stick to the
 > Pentium's RISC-like instructions—the pairable instructions I'll discuss
 > next—when you're seeking maximum performance, with just a few exceptions
-> such as **REP MOVS** and **REP STOS**.
+> such as `REP MOVS` and `REP STOS`.
 
 Trickier yet, register contention can shut down the V-pipe on any given
 cycle, and Address Generation Interlocks (AGIs) can stall either pipe at