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58-04.md
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58-04.md
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@ -7,7 +7,7 @@ to John Miles, but not there yet. We have one more trick up our sleeve,
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though: Suppose we point SS to the segment containing our textures, and
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point DS to the screen? (This requires either setting up a stack in the
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texture segment or ensuring that interrupts and other stack activity
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can’t happen while SS points to that segment.) Then, we could swap the
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can't happen while SS points to that segment.) Then, we could swap the
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functions of SI and BP; that would let us use BP, which accesses SS by
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default, to get at the textures, and DI to access the screen—all with no
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segment prefixes at all. By gosh, that would get us exactly one more
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@ -60,36 +60,36 @@ Or can we?
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ENDM
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#### Don’t Stop Thinking about Those Cycles {#Heading7}
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#### Don't Stop Thinking about Those Cycles {#Heading7}
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Remember what I said at the outset, that knowing something has been done
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makes it much easier to do? A corollary is that pushing past that point,
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once attained, is very difficult. It’s only natural to want to relax in
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once attained, is very difficult. It's only natural to want to relax in
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the satisfaction of a job well done; then, too, the very nature of the
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work changes. Getting from 44 cycles down to John’s 9 cycles was a huge
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work changes. Getting from 44 cycles down to John's 9 cycles was a huge
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leap, but we knew it could be done—therefore the nature of the problem
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was to figure out *how* it was done; in cases like this, if we’re sharp
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enough (and of course we are!), we’re guaranteed eventual gratification.
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Now that we’ve reached John’s level of performance, the problem becomes
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*whether* the code can be made faster yet, and that’s a different kettle
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was to figure out *how* it was done; in cases like this, if we're sharp
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enough (and of course we are!), we're guaranteed eventual gratification.
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Now that we've reached John's level of performance, the problem becomes
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*whether* the code can be made faster yet, and that's a different kettle
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of fish altogether, for it may well be that after thinking about it for
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a while, we’ll conclude that it can’t. Not only will we have wasted
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time, but we’ll also never be sure we were right; we’ll know only that
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*we* couldn’t find a solution. That way lies madness.
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a while, we'll conclude that it can't. Not only will we have wasted
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time, but we'll also never be sure we were right; we'll know only that
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*we* couldn't find a solution. That way lies madness.
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And yet—*someone* has to blaze the trail to higher performance, and that
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someone might as well be us. Let’s look for weaknesses in Listing 58.3.
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someone might as well be us. Let's look for weaknesses in Listing 58.3.
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None are readily apparent; the only cycle that looks even slightly
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wasted is the size prefix on **ADD EDX,ECX**. As it turns out, that
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cycle really *is* wasted, for there’s a way to make the size prefix
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cycle really *is* wasted, for there's a way to make the size prefix
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vanish without losing the benefits of 32-bit instructions: Move the code
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into a 32-bit segment and make *all* the instructions 32-bit. That’s
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into a 32-bit segment and make *all* the instructions 32-bit. That's
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what Listing 58.4 does; this code is similar to Listing 58.3, but runs
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in 8 cycles per pixel, a 12.5 percent speedup over Listing 58.3. Whether
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Listing 58.4 actually draws more pixels per second than Listing 58.3
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depends on whether display memory is fast enough to handle pixels as
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rapidly as Listing 58.4 can deliver them. That speed, one pixel every
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122 nanoseconds on a 486/66, is one that ISA adapters can’t hope to
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122 nanoseconds on a 486/66, is one that ISA adapters can't hope to
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match, but fast VLB and PCI adapters can handle with ease. Be aware,
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too, that cache misses when reading the source texture will generally
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reduce performance below the calculated 8-cycles-per-pixel level,
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