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James Gregory 2013-12-30 18:34:31 +11:00
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@ -24,14 +24,14 @@ writes, so old and new images can mix on the screen, producing unwanted
color effects as, say, three planes from the old image mix with one
plane from the new image. The sample program solves this by ensuring
that the memory written to is zeroed. A better way to set all planes at
once is provided by the set/reset capabilities of the VGA, which I’ll
once is provided by the set/reset capabilities of the VGA, which I'll
cover in Chapter 25.
The sample program writes the image of the colored ball to VGA memory by
enabling one plane at a time and writing the image of the ball for that
plane. Each image is written to the same VGA addresses; only the
destination plane, selected by the Map Mask register, is different. You
might think of the ball’s image as consisting of four colored overlays,
might think of the ball's image as consisting of four colored overlays,
which together make up a multicolored image. The sample program writes a
blank image to VGA memory by enabling all planes and writing a block of
zero bytes; the zero bytes are written to all four VGA planes
@ -48,11 +48,11 @@ states that occur on accesses to VGA memory make it very desirable to
minimize display memory accesses, and because **OUT**s tend to be very
slow.
The solution is to take advantage of the VGA’s write mode 1, which is
The solution is to take advantage of the VGA's write mode 1, which is
selected via bits 0 and 1 of the GC Mode register (GC register 5). (Be
careful to preserve bits 2-7 when setting bits 0 and 1, as is done in
Listing 23.1.) In write mode 1, a single **CPU** read loads the
addressed byte from all four planes into the VGA’s four internal
addressed byte from all four planes into the VGA's four internal
latches, and a single **CPU** write writes the contents of the latches
to the four planes. During the write, the byte written by the **CPU** is
irrelevant.
@ -61,7 +61,7 @@ The sample program uses write mode 1 to copy the images that were
previously drawn to the high end of VGA memory into a desired area of
display memory, all in a single block copy operation. This is an
excellent way to keep the number of reads, writes, and OUTs required to
manipulate the VGA’s display memory low enough to allow real-time
manipulate the VGA's display memory low enough to allow real-time
drawing.
The Map Mask register can still mask out planes in write mode 1. All
@ -72,12 +72,12 @@ The animated images appear to move a bit jerkily because they are
byte-aligned and so must move a minimum of 8 pixels horizontally. This
is easily solved by storing rotated versions of all images in VGA
memory, and then in each instance drawing the correct rotation for the
pixel alignment at which the image is to be drawn; we’ll see this
pixel alignment at which the image is to be drawn; we'll see this
technique in action in Chapter 49.
Don’t worry if you’re not catching everything in this chapter on the
Don't worry if you're not catching everything in this chapter on the
first pass; the VGA is a complicated beast, and learning about it is an
iterative process. We’ll be going over these features again, in
iterative process. We'll be going over these features again, in
different contexts, over the course of the rest of this book.
#### Page Flipping {#Heading9}
@ -92,7 +92,7 @@ display memory is displayed while another is being modified. The
modifications never affect an area of memory as it is providing video
data, so no undesirable side effects occur. Once the modification is
complete, the modified buffer is selected for display, causing the
screen to change to the new image in a single frame’s time, typically
screen to change to the new image in a single frame's time, typically
1/60th or 1/70th of a second. The other buffer is then available for
modification.
@ -103,14 +103,14 @@ are needed. The sample program uses two 672x384 virtual pages, each
32,256 bytes long, one starting at A000:0000 and the other starting at
A000:7E00. Flipping between the pages is as simple as setting the start
address registers to point to one display area or the other—but, as it
turns out, that’s not as simple as it sounds.
turns out, that's not as simple as it sounds.
The timing of the switch between pages is critical to achieving
flicker-free animation. It is essential that the program never be
modifying an area of display memory as that memory is providing video
data. Achieving this is surprisingly complicated on the VGA, however.
The problem is as follows. The start address is latched by the VGA’s
The problem is as follows. The start address is latched by the VGA's
internal circuitry exactly once per frame, typically (but not always on
all clones) at the start of the vertical sync pulse. The vertical sync
status is, in fact, available as bit 3 of the Input Status 0 register,
@ -118,14 +118,14 @@ addressable at 3BAH (in monochrome modes) or 3DAH (color).
Unfortunately, by the time the vertical sync status is observed by a
program, the start address for the next frame has already been latched,
having happened the instant the vertical sync pulse began. That means
that it’s no good to wait for vertical sync to begin, then set the new
start address; if we did that, we’d have to wait until the *next*
vertical sync pulse to start drawing, because the page wouldn’t flip
that it's no good to wait for vertical sync to begin, then set the new
start address; if we did that, we'd have to wait until the *next*
vertical sync pulse to start drawing, because the page wouldn't flip
until then.
Clearly, what we want is to set the new start address, then wait for the
start of the vertical sync pulse, at which point we can be sure the page
has flipped. However, we can’t just set the start address and wait,
has flipped. However, we can't just set the start address and wait,
because we might have the extreme misfortune to set one of the start
address registers before the start of vertical sync and the other after,
resulting in mismatched halves of the start address and a nasty jump of