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James Gregory
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12-04.md
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12-04.md
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[Previous](12-03.html) [Table of Contents](index.html) [Next](13-01.html)
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------------------------ --------------------------------- --------------------
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You don’t need to understand every corner of the 486 universe unless
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you’re a diehard ASMhead who does this stuff for fun. Just learn enough
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You don't need to understand every corner of the 486 universe unless
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you're a diehard ASMhead who does this stuff for fun. Just learn enough
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to be able to speed up the key portions of your programs, and spend the
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rest of your time on a fast design and overall implementation.
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#### More Fun with Byte Registers {#Heading10}
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Rule \#4: Don’t load *any* byte register exactly 2 cycles before using
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Rule \#4: Don't load *any* byte register exactly 2 cycles before using
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*any* register to address memory.
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This, the last of this chapter’s rules, is the strangest of the lot. If
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This, the last of this chapter's rules, is the strangest of the lot. If
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any byte register is loaded, and then two cycles later any register is
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used to point to memory, one cycle is lost. So, for example, this code
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@ -43,7 +43,7 @@ runs in the expected three cycles.
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In truth, I do not know why this happens. Clearly, it has something to
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do with interrupting the start of the addressing pipeline, and I have my
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theories about how this works, but at this point they’re pure
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theories about how this works, but at this point they're pure
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speculation. Whatever the reason for this rule, ignorance of it—and of
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its interaction with the other rules—could lead to considerable
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performance loss in seemingly air-tight code. For instance, a casual
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@ -68,7 +68,7 @@ pipeline is now on its first cycle: the one that loading a byte register
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can affect.
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------------------- -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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 *I know—it seems awfully complicated. It isn’t, really. Generally, try not to use byte destinations exactly two cycles before using a register to address memory, and try not to load a register either one or two cycles before using it to address memory, and you’ll be fine.*
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 *I know—it seems awfully complicated. It isn't, really. Generally, try not to use byte destinations exactly two cycles before using a register to address memory, and try not to load a register either one or two cycles before using it to address memory, and you'll be fine.*
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------------------- -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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#### Timing Your Own 486 Code {#Heading11}
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@ -82,7 +82,7 @@ address memory. Listing 12.1 ran in 120 µs on a 33 MHz 486, or 4 cycles
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per repetition (120 µs/1000 repetitions = 120 ns per repetition; 120 ns
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per repetition/30 ns per cycle = 4 cycles per repetition); Listing 12.2
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ran in 90 µs, or 3 cycles, establishing that loading a byte register
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costs a cycle only when it’s performed exactly 2 cycles before
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costs a cycle only when it's performed exactly 2 cycles before
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addressing memory.
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**LISTING 12.1 LST12-1.ASM**
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@ -90,7 +90,7 @@ addressing memory.
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; Measures the effect of loading a byte register 2 cycles before
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; using a register to address memory.
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mov bp,2 ;run the test code twice to make sure
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; it’s cached
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; it's cached
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sub bx,bx
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CacheFillLoop:
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call ZTimerOn ;start timing
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@ -110,7 +110,7 @@ addressing memory.
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; Measures the effect of loading a byte register 1 cycle before
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; using a register to address memory.
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mov bp,2 ;run the test code twice to make sure
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; it’s cached
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; it's cached
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sub bx,bx
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CacheFillLoop:
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call ZTimerOn ;start timing
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@ -129,31 +129,31 @@ Note that Listings 12.1 and 12.2 each repeat the timing of the code
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under test a second time, to make sure that the instructions are in the
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cache on the second pass, the one for which results are displayed. Also
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note that the code is less than 8K in size, so that it can all fit in
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the 486’s 8K internal cache. If I double the **REPT** value in Listing
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the 486's 8K internal cache. If I double the **REPT** value in Listing
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12.2 to 2,000, making the test code larger than 8K, the execution time
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more than doubles to 224 µs, or 3.7 cycles per repetition; the extra
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seven-tenths of a cycle comes from fetching non-cached instruction
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bytes.
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------------------- -----------------------------------------------------------------------------------------------------------------------
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 *Whenever you see non-integral timing results of this sort, it’s a good bet that the test code or data isn’t cached.*
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 *Whenever you see non-integral timing results of this sort, it's a good bet that the test code or data isn't cached.*
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------------------- -----------------------------------------------------------------------------------------------------------------------
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### The Story Continues {#Heading12}
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There’s certainly plenty more 486 lore to explore, including the 486’s
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There's certainly plenty more 486 lore to explore, including the 486's
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unique prefetch queue, more optimization rules, branching optimizations,
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performance implications of the cache, the cost of cache misses for
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reads, and the implications of cache write-through for writes.
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Nonetheless, we’ve covered quite a bit of ground in this chapter, and I
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trust you’ve gotten a feel for the considerable extent to which 486
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optimization differs from what you’re used to. Odd as 486 optimization
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is, though, it’s well worth mastering, for the 486 is, at its best, so
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Nonetheless, we've covered quite a bit of ground in this chapter, and I
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trust you've gotten a feel for the considerable extent to which 486
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optimization differs from what you're used to. Odd as 486 optimization
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is, though, it's well worth mastering, for the 486 is, at its best, so
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staggeringly fast that carefully crafted 486 code can do more than twice
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as much per cycle as the best 386 code—which makes it perhaps 50 times
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as fast as optimized code for the original PC.
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Sometimes it *is* hard to believe we’re still in Kansas!
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Sometimes it *is* hard to believe we're still in Kansas!
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------------------------ --------------------------------- --------------------
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[Previous](12-03.html) [Table of Contents](index.html) [Next](13-01.html)
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