Normal quotes

03-03.md

@@ -4,18 +4,18 @@
 
 #### The Zen Timer Is a Means, Not an End {#Heading5}
 
-We’re going to spend the rest of this chapter seeing what the Zen timer
-can do, examining how it works, and learning how to use it. I’ll be
+We're going to spend the rest of this chapter seeing what the Zen timer
+can do, examining how it works, and learning how to use it. I'll be
 using the Zen timer again and again over the course of this book, so
-it’s essential that you learn what the Zen timer can do and how to use
+it's essential that you learn what the Zen timer can do and how to use
 it. On the other hand, it is by no means essential that you understand
 exactly how the Zen timer works. (Interesting, yes; essential, no.)
 
-In other words, the Zen timer isn’t really part of the knowledge we
-seek; rather, it’s one tool with which we’ll acquire that knowledge.
-Consequently, you shouldn’t worry if you don’t fully grasp the inner
+In other words, the Zen timer isn't really part of the knowledge we
+seek; rather, it's one tool with which we'll acquire that knowledge.
+Consequently, you shouldn't worry if you don't fully grasp the inner
 workings of the Zen timer. Instead, focus on learning how to *use* it,
-and you’ll be on the right road.
+and you'll be on the right road.
 
 #### Starting the Zen Timer {#Heading6}
 
@@ -23,9 +23,9 @@ and you’ll be on the right road.
 **ZTimerOn** saves the context of the calling code, disables interrupts,
 sets timer 0 of the 8253 to mode 2 (divide-by-N mode), sets the initial
 timer count to 0, restores the context of the calling code, and returns.
-(I’d like to note that while Intel’s documentation for the 8253 seems to
-indicate that a timer won’t reset to 0 until it finishes counting down,
-in actual practice, timers seem to reset to 0 as soon as they’re
+(I'd like to note that while Intel's documentation for the 8253 seems to
+indicate that a timer won't reset to 0 until it finishes counting down,
+in actual practice, timers seem to reset to 0 as soon as they're
 loaded.)
 
 Two aspects of **ZTimerOn** are worth discussing further. One point of
@@ -45,16 +45,16 @@ enable interrupts during that time.
 A second interesting point about **ZTimerOn** is that it may introduce
 some small inaccuracy into the system clock time whenever it is called.
 To understand why this is so, we need to examine the way in which both
-the 8253 and the PC’s system clock (which keeps the current time) work.
+the 8253 and the PC's system clock (which keeps the current time) work.
 
 The 8253 actually contains three timers, as shown in Figure 3.1. All
-three timers are driven by the system board’s 14.31818 MHz crystal,
+three timers are driven by the system board's 14.31818 MHz crystal,
 divided by 12 to yield a 1.19318 MHz clock to the timers, so the timers
 count once every 838.1 ns. Each of the three timers counts down in a
 programmable way, generating a signal on its output pin when it counts
 down to 0. Each timer is capable of being halted at any time via a 0
-level on its gate input; when a timer’s gate input is 1, that timer
-counts constantly. All in all, the 8253’s timers are inherently very
+level on its gate input; when a timer's gate input is 1, that timer
+counts constantly. All in all, the 8253's timers are inherently very
 flexible timing devices; unfortunately, much of that flexibility depends
 on how the timers are connected to external circuitry, and in the PC the
 timers are connected with specific purposes in mind.
@@ -65,7 +65,7 @@ is the only timer with a programmable gate input in the PC; that is,
 timer 2 is the only timer that can be started and stopped under program
 control in the manner specified by Intel. On the other hand, the
 *output* of timer 2 is connected to nothing other than the speaker. In
-particular, timer 2 cannot generate an interrupt to get the 8088’s
+particular, timer 2 cannot generate an interrupt to get the 8088's
 attention.
 
 Timer 1 is dedicated to providing dynamic RAM refresh, and should not be
@@ -114,16 +114,16 @@ Divide-by-N mode counts down by one from the initial count. When the
 count reaches zero, the timer turns over and starts counting down again
 without stopping, and a pulse is generated for a single clock period.
 While the pulse is not held for nearly as long as in square wave mode,
-it doesn’t matter, since the 8259 interrupt controller is configured in
+it doesn't matter, since the 8259 interrupt controller is configured in
 the PC to be edgeand hence cares only about the existence of a pulse
 from timer 0, not the duration of the pulse. As a result, timer 0
 continues to generate timer interrupts in divide-by-N mode, and the
 system clock continues to maintain good time.
 
 Why not use timer 2 instead of timer 0 for precision timing? After all,
-timer 2 has a programmable gate input and isn’t used for anything but
-sound generation. The problem with timer 2 is that its output can’t
-generate an interrupt; in fact, timer 2 can’t do anything but drive the
+timer 2 has a programmable gate input and isn't used for anything but
+sound generation. The problem with timer 2 is that its output can't
+generate an interrupt; in fact, timer 2 can't do anything but drive the
 speaker. We need the interrupt generated by the output of timer 0 to
 tell us when the count has overflowed, and we will see shortly that the
 timer interrupt also makes it possible to time much longer periods than