Strip comments and inline ids onto h*
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13-04.html
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13-04.html
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@ -10,16 +10,9 @@
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<meta name="vspubdate" content="07/01/97" />
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<meta name="vscategory" content="Web and Software Development: Game Development,Web and Software Development: Graphics and Multimedia Development" />
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<title>Michael Abrash's Graphics Programming Black Book Special Edition: Aiming the 486</title><!-- HEADER -->
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<!-- Empty Reference Subhead -->
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<!--ISBN=1576101746//-->
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<!--TITLE=Michael Abrash's Graphics Programming Black Book Special Edition//-->
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<!--AUTHOR=Michael Abrash//-->
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<!--PUBLISHER=The Coriolis Group, Inc.//-->
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<title>Michael Abrash's Graphics Programming Black Book Special Edition: Aiming the 486</title>
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<meta name="chapter" content="13" />
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<meta name="pages" content="256-258" />
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<!--UNASSIGNED1//-->
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<!--UNASSIGNED2//-->
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</head>
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<body>
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@ -37,12 +30,12 @@
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<p><br /></p>
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<h3><a id="Heading7"></a>32-Bit Addressing Modes</h3>
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<h3 id="Heading7">32-Bit Addressing Modes</h3>
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<p>The 386 and 486 both support 32-bit addressing modes, in which any register may serve as the base memory addressing register, and almost any register may serve as the potentially scaled index register. For example,</p><!-- CODE SNIP //-->
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<p>The 386 and 486 both support 32-bit addressing modes, in which any register may serve as the base memory addressing register, and almost any register may serve as the potentially scaled index register. For example,</p>
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<pre>
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mov al,BaseTable[ecx+edx*4]
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</pre><!-- END CODE SNIP //-->
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</pre>
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<p>uses a perfectly valid 32-bit address, with the byte accessed being the one at the offset in DS pointed to by the sum of EDX times 4 plus the offset of <b>BaseTable</b> plus ECX. This is a very powerful memory addressing scheme, far superior to 8088-style 16-bit addressing, but it’s not without its quirks and costs, so let’s take a quick look at 32-bit addressing. (By the way, 32-bit addressing is not limited to protected mode; 32-bit instructions may be used in real mode, although each instruction that uses 32-bit addressing must have an address-size prefix byte, and the presence of a prefix byte costs a cycle on a 486.)</p>
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@ -60,16 +53,16 @@ mov al,BaseTable[ecx+edx*4]
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</tr>
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</table>
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<p>However, because 32-bit addressing supports many more addressing combinations than 16-bit addressing, the Mod-R/M byte can’t describe all the combinations. Therefore, whenever an index register (as described above) is involved, a second byte, the SIB byte, follows the Mod-R/M byte to provide additional address information. Consequently, whenever you use a scaled memory addressing register or use the sum of two registers to point to memory, you automatically add 1 cycle and 1 byte to that instruction. This is not to say that you shouldn’t use index registers when they’re needed, but if you find yourself using them inside key loops, you should see if it’s possible to move the index calculation outside the loop as, for example, in a loop like this:</p><!-- CODE SNIP //-->
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<p>However, because 32-bit addressing supports many more addressing combinations than 16-bit addressing, the Mod-R/M byte can’t describe all the combinations. Therefore, whenever an index register (as described above) is involved, a second byte, the SIB byte, follows the Mod-R/M byte to provide additional address information. Consequently, whenever you use a scaled memory addressing register or use the sum of two registers to point to memory, you automatically add 1 cycle and 1 byte to that instruction. This is not to say that you shouldn’t use index registers when they’re needed, but if you find yourself using them inside key loops, you should see if it’s possible to move the index calculation outside the loop as, for example, in a loop like this:</p>
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<pre>
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LoopTop:
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add ax,DataTable[ebx*2]
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inc ebx
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dec cx
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jnz LoopTop
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</pre><!-- END CODE SNIP //-->
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</pre>
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<p>You could change this to the following for greater performance:</p><!-- CODE SNIP //-->
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<p>You could change this to the following for greater performance:</p>
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<pre>
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add ebx,ebx ;ebx*2
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LoopTop:
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@ -78,7 +71,7 @@ LoopTop:
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dec cx
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jnz LoopTop
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shr ebx,1 ;ebx*2/2
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</pre><!-- END CODE SNIP //-->
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</pre>
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<p>I’ll end this chapter with two more quirks of 32-bit addressing. First, as with 16-bit addressing, addressing that uses EBP as a base register both accesses the SS segment by default and always has a displacement of at least 1 byte. This reflects the common use of EBP to address a stack frame, but is worth keeping in mind if you should happen to use EBP to address non-stack memory.</p>
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@ -101,10 +94,6 @@ LoopTop:
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<div align="center">
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Graphics Programming Black Book © 2001 Michael Abrash
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</div><!-- all of the reference materials (books) have the footer and subfoot reveresed -->
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<!-- reference_subfoot = footer -->
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<!-- reference_footer = subfoot -->
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<!-- BEGIN SUB FOOTER -->
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<!-- END FOOTER -->
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</div>
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</body>
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</html>
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